September 2017 - Anl-intel-lrz-knr - mailman3.cels.anl.gov

[Anl-intel-csa] QMCPACK performance projections
by Vitali A. Morozov 29 Sep '17

29 Sep '17

Hello, as discussed during the call, here is the QMCPACK document with a description of A21 performance projection methodology. Any feedback is greatly appreciated. Vitali On 09/28/2017 09:30 AM, Kumaran, Kalyan wrote: > We do have our regularly scheduled conference call this Friday, September 29th, at 1:00pm central. > > For Argonne folks I have reserved 4313. > > For folks dialing in you will find the Skype information on the confluence page. > > Agenda: > > * New, extremely good, results for *GEMM (Daya - 30 mins) > * Update on applications - all (30 mins) > > -Kumar > _______________________________________________ > anl-intel-csa mailing list > anl-intel-csa(a)lists.jlse.anl.gov > https://lists.jlse.anl.gov/mailman/listinfo/anl-intel-csa

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[Anl-intel-csa] Conference call tomorrow - Sept 29th, 1:00pm central
by Kumaran, Kalyan 28 Sep '17

28 Sep '17

We do have our regularly scheduled conference call this Friday, September 29th, at 1:00pm central. For Argonne folks I have reserved 4313. For folks dialing in you will find the Skype information on the confluence page. Agenda: * New, extremely good, results for *GEMM (Daya - 30 mins) * Update on applications - all (30 mins) -Kumar

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[Anl-intel-csa] Canceled: ANL/Intel CSA Workload Characterization
by Petrini, Fabrizio 13 Sep '17

13 Sep '17

Placeholder for weekly ANL/Intel CSA Exascale workload characterization meeting ......................................................................................................................................... --> Join Skype Meeting<https://meet.intel.com/fabrizio.petrini/7K7FM32F> Trouble Joining? Try Skype Web App<https://meet.intel.com/fabrizio.petrini/7K7FM32F?sl=1> Join by phone +1(916)356-2663 (or your local bridge access #) Choose bridge 5.<tel:+1(916)356-2663%20(or%20your%20local%20bridge%20access%20#)%20Choose%20bridge%205.> (Global) English (United States) Find a local number<https://dial.intel.com> Conference ID: 791574018 Forgot your dial-in PIN?<https://dial.intel.com> |Help<https://o15.officeredir.microsoft.com/r/rlidLync15?clid=1033&p1=5&p2=2009> [!OC([1033])!] .........................................................................................................................................

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[Anl-intel-csa] Canceled: ANL/Intel CSA Workload Characterization
by Petrini, Fabrizio 13 Sep '17

13 Sep '17

Placeholder for weekly ANL/Intel CSA Exascale workload characterization meeting ......................................................................................................................................... --> Join Skype Meeting<https://meet.intel.com/fabrizio.petrini/7K7FM32F> Trouble Joining? Try Skype Web App<https://meet.intel.com/fabrizio.petrini/7K7FM32F?sl=1> Join by phone +1(916)356-2663 (or your local bridge access #) Choose bridge 5.<tel:+1(916)356-2663%20(or%20your%20local%20bridge%20access%20#)%20Choose%20bridge%205.> (Global) English (United States) Find a local number<https://dial.intel.com> Conference ID: 791574018 Forgot your dial-in PIN?<https://dial.intel.com> |Help<https://o15.officeredir.microsoft.com/r/rlidLync15?clid=1033&p1=5&p2=2009> [!OC([1033])!] .........................................................................................................................................

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[Anl-intel-csa] No meeting this Friday or next
by Kumaran, Kalyan 13 Sep '17

13 Sep '17

I’m canceling the meetings scheduled for this Friday (15th) and next Friday (22nd) as folks are busy preparing for DR. -Kumar

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Re: [Anl-intel-csa] Examples calling CSA functions from Fortran
by Hammond, Jeff R 08 Sep '17

08 Sep '17

I have ported example/101-tutorial_examples/test_ex01 to Fortran and use the Fortran 2003+ C-interoperability layer to invoke CSA functions. These features of Fortran weren't intuitive to me, but I found https://gcc.gnu.org/onlinedocs/gfortran/Interoperability-with-C.html and http://fortranwiki.org/fortran/show/Generating+C+Interfaces helpful. I attached the code (email me for password) that you should copy into example/101-tutorial_examples. Note that, while the csa_fortran module is extensible, you have to write a csa_call wrapper for every CSA kernel because Fortran doesn't support unions. I will probably have a workaround for this in a few days. Jeff From: anl-intel-csa <anl-intel-csa-bounces(a)lists.jlse.anl.gov> on behalf of Barry M Tannenbaum <barry.m.tannenbaum(a)intel.com> Date: Wednesday, August 16, 2017 at 10:42 AM To: "anl-intel-csa(a)jlse.anl.gov" <anl-intel-csa(a)jlse.anl.gov> Subject: [Anl-intel-csa] Examples calling CSA functions from Fortran I just got a question about calling the CSA functions from Fortran. Unfortunately, I haven’t used Fortran since college (way longer ago than I want to think about) and that was Fortran 66 on a CDC 6400. I’m sure the language has changed a bit since then. There was mention at one meeting or another that there are examples of calling the CSA functions from Fortran. Can any of you give us an example we can share? Thanks. - Barry

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Re: [Anl-intel-csa] segfault with wide loads and memory model
by Fleming, Kermin 07 Sep '17

07 Sep '17

There is also a known segfault around reloaded CSA graphs: csa_invoke(graph1,…) csa_invoke(graph2,…) This bug is fixed in the next release. From: anl-intel-csa [mailto:[email protected]] On Behalf Of Glossop, Kent Sent: Thursday, September 7, 2017 1:56 PM To: Tannenbaum, Barry M <barry.m.tannenbaum(a)intel.com>; Christopher Knight <knightc(a)anl.gov>; anl-intel-csa(a)jlse.anl.gov Subject: Re: [Anl-intel-csa] segfault with wide loads and memory model Note – we are going to be removing the wide loads/stores from the examples in the near future, and I don’t expect we will ever want to do the work to make them work in the simple memory model. To give an idea of timeline - I would hope they have been completely removed from the examples, architecture doc., and simulator by early to mid October. (We know they are not going to be there, and there is no point putting effort into dealing with them.) From: anl-intel-csa [mailto:[email protected]] On Behalf Of Tannenbaum, Barry M Sent: Thursday, September 07, 2017 1:52 PM To: Christopher Knight <knightc(a)anl.gov<mailto:[email protected]>>; anl-intel-csa(a)jlse.anl.gov<mailto:[email protected]> Subject: Re: [Anl-intel-csa] segfault with wide loads and memory model Wide loads and stores (ldNx8 and stNx8) are being de-emphasized in favor of streaming loads and stores (sldN and sstN). The API between the memory model and the functional simulator was modified to support streaming loads/stores, and I haven’t gotten around to updating the code for wide loads/stores. From: anl-intel-csa [mailto:[email protected]] On Behalf Of Christopher Knight Sent: Thursday, September 7, 2017 1:43 PM To: anl-intel-csa(a)jlse.anl.gov<mailto:[email protected]> Subject: [Anl-intel-csa] segfault with wide loads and memory model Hello, I seem to be hitting a segfault when using the memory model, and it looks to be triggered by use of wide loads. The same graph runs fine without memory model. An example is below, where I can easily get around the segfault by using a sequence of loads. ld64x bi_addr, bondlist, i #ld32x8 i1, i2, type, %na, %na, %na, %na, %na, bi_addr ld32x i1, bi_addr, 0 ld32x i2, bi_addr, 1 ld32x type, bi_addr, 2 This is with a graph written for LAMMPS. I tried reproducing in one of the examples in ${CSASIM_TOP}/example, but that resulted in different crash… The example 059-multivalue-mem runs fine for me without memory model, but crashes with “one or more LICS not empty on exit” with memory model activated. chris ====================== Using simple memory model *** Error in `/home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa': free(): invalid size: 0x0000000002669650 *** ======= Backtrace: ========= /lib64/libc.so.6(+0x7c619)[0x7f0c1cd59619] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so(_ZN6CSASIM14VectorLoad8xOpINS_7i32TypeEE5issueEx+0x691)[0x7f0c1e062d51] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so(_ZN6CSASIM9Processor12stepOneCycleEPNS_6SymbolE+0x46f)[0x7f0c1e0754ff] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so(_ZN17ASIM_SYSTEM_CLASS11SYS_ExecuteEPN6CSASIM6SymbolE+0x52)[0x7f0c1c3c6482] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so(invokePerfModel+0x3b)[0x7f0c1c3c21db] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x603266] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0xc7d9ff] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x61b43a] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x49a333] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x4929da] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x49153d] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0xbb7771] /lib64/libc.so.6(__libc_start_main+0xf5)[0x7f0c1ccfec05] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x403704] ======= Memory map: ======== 00400000-00e9f000 r-xp 00000000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0109e000-0109f000 r--p 00a9e000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0109f000-010a3000 rw-p 00a9f000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0113f000-09f1b000 rw-p 00000000 00:00 0 [heap] 7f0c14000000-7f0c14021000 rw-p 00000000 00:00 0 7f0c14021000-7f0c18000000 ---p 00000000 00:00 0 7f0c186ac000-7f0c18d6d000 rw-p 00000000 00:00 0 7f0c18d6d000-7f0c1942e000 rw-p 00000000 00:00 0 7f0c199cf000-7f0c1a390000 rw-p 00000000 00:00 0 7f0c1a671000-7f0c1ad32000 rw-p 00000000 00:00 0 7f0c1aeb4000-7f0c1b575000 rw-p 00000000 00:00 0 7f0c1b575000-7f0c1bc36000 rw-p 00000000 00:00 0 7f0c1bd04000-7f0c1c005000 rw-p 00000000 00:00 0 7f0c1c3bc000-7f0c1c3cf000 r-xp 00000000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c3cf000-7f0c1c5ce000 ---p 00013000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5ce000-7f0c1c5cf000 r--p 00012000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5cf000-7f0c1c5d0000 rw-p 00013000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5d0000-7f0c1c8d1000 rw-p 00000000 00:00 0 7f0c1c8d1000-7f0c1c8d8000 r-xp 00000000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1c8d8000-7f0c1cad7000 ---p 00007000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad7000-7f0c1cad8000 r--p 00006000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad8000-7f0c1cad9000 rw-p 00007000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad9000-7f0c1cadb000 r-xp 00000000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1cadb000-7f0c1ccdb000 ---p 00002000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdb000-7f0c1ccdc000 r--p 00002000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdc000-7f0c1ccdd000 rw-p 00003000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdd000-7f0c1ce95000 r-xp 00000000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1ce95000-7f0c1d095000 ---p 001b8000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d095000-7f0c1d099000 r--p 001b8000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d099000-7f0c1d09b000 rw-p 001bc000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d09b000-7f0c1d0a0000 rw-p 00000000 00:00 0 7f0c1d0a0000-7f0c1d0b7000 r-xp 00000000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d0b7000-7f0c1d2b6000 ---p 00017000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b6000-7f0c1d2b7000 r--p 00016000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b7000-7f0c1d2b8000 rw-p 00017000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b8000-7f0c1d2bc000 rw-p 00000000 00:00 0 7f0c1d2bc000-7f0c1d2d1000 r-xp 00000000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d2d1000-7f0c1d4d0000 ---p 00015000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d0000-7f0c1d4d1000 r--p 00014000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d1000-7f0c1d4d2000 rw-p 00015000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d2000-7f0c1d5a1000 r-xp 00000000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d5a1000-7f0c1d7a0000 ---p 000cf000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a0000-7f0c1d7a1000 r--p 000ce000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a1000-7f0c1d7a6000 rw-p 000cf000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a6000-7f0c1d7b0000 rw-p 00000000 00:00 0 7f0c1d7b0000-7f0c1d899000 r-xp 00000000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1d899000-7f0c1da99000 ---p 000e9000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1da99000-7f0c1daa1000 r--p 000e9000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1daa1000-7f0c1daa3000 rw-p 000f1000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1daa3000-7f0c1dab8000 rw-p 00000000 00:00 0 7f0c1dab8000-7f0c1dbb9000 r-xp 00000000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1dbb9000-7f0c1ddb8000 ---p 00101000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddb8000-7f0c1ddb9000 r--p 00100000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddb9000-7f0c1ddba000 rw-p 00101000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddba000-7f0c1e157000 r-xp 00000000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e157000-7f0c1e356000 ---p 0039d000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e356000-7f0c1e39f000 r--p 0039c000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e39f000-7f0c1e3c3000 rw-p 003e5000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e3c3000-7f0c1e3f1000 rw-p 00000000 00:00 0 7f0c1e3f1000-7f0c1e412000 r-xp 00000000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e5fa000-7f0c1e601000 rw-p 00000000 00:00 0 7f0c1e60a000-7f0c1e612000 rw-p 00000000 00:00 0 7f0c1e612000-7f0c1e613000 r--p 00021000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e613000-7f0c1e614000 rw-p 00022000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e614000-7f0c1e615000 rw-p 00000000 00:00 0 7fff63619000-7fff6363c000 rw-p 00000000 00:00 0 [stack] 7fff63713000-7fff63715000 r-xp 00000000 00:00 0 [vdso] ffffffffff600000-ffffffffff601000 r-xp 00000000 00:00 0 [vsyscall] ./run.sh: line 23: 25511 Aborted env OMP_NUM_THREADS=1 CSASIM_MODEL_MEMORY=1 ${EXE} -i in.rhodo-charmm

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Re: [Anl-intel-csa] segfault with wide loads and memory model
by Glossop, Kent 07 Sep '17

07 Sep '17

Note – we are going to be removing the wide loads/stores from the examples in the near future, and I don’t expect we will ever want to do the work to make them work in the simple memory model. To give an idea of timeline - I would hope they have been completely removed from the examples, architecture doc., and simulator by early to mid October. (We know they are not going to be there, and there is no point putting effort into dealing with them.) From: anl-intel-csa [mailto:[email protected]] On Behalf Of Tannenbaum, Barry M Sent: Thursday, September 07, 2017 1:52 PM To: Christopher Knight <knightc(a)anl.gov>; anl-intel-csa(a)jlse.anl.gov Subject: Re: [Anl-intel-csa] segfault with wide loads and memory model Wide loads and stores (ldNx8 and stNx8) are being de-emphasized in favor of streaming loads and stores (sldN and sstN). The API between the memory model and the functional simulator was modified to support streaming loads/stores, and I haven’t gotten around to updating the code for wide loads/stores. From: anl-intel-csa [mailto:[email protected]] On Behalf Of Christopher Knight Sent: Thursday, September 7, 2017 1:43 PM To: anl-intel-csa(a)jlse.anl.gov<mailto:[email protected]> Subject: [Anl-intel-csa] segfault with wide loads and memory model Hello, I seem to be hitting a segfault when using the memory model, and it looks to be triggered by use of wide loads. The same graph runs fine without memory model. An example is below, where I can easily get around the segfault by using a sequence of loads. ld64x bi_addr, bondlist, i #ld32x8 i1, i2, type, %na, %na, %na, %na, %na, bi_addr ld32x i1, bi_addr, 0 ld32x i2, bi_addr, 1 ld32x type, bi_addr, 2 This is with a graph written for LAMMPS. I tried reproducing in one of the examples in ${CSASIM_TOP}/example, but that resulted in different crash… The example 059-multivalue-mem runs fine for me without memory model, but crashes with “one or more LICS not empty on exit” with memory model activated. chris ====================== Using simple memory model *** Error in `/home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa': free(): invalid size: 0x0000000002669650 *** ======= Backtrace: ========= /lib64/libc.so.6(+0x7c619)[0x7f0c1cd59619] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so(_ZN6CSASIM14VectorLoad8xOpINS_7i32TypeEE5issueEx+0x691)[0x7f0c1e062d51] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so(_ZN6CSASIM9Processor12stepOneCycleEPNS_6SymbolE+0x46f)[0x7f0c1e0754ff] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so(_ZN17ASIM_SYSTEM_CLASS11SYS_ExecuteEPN6CSASIM6SymbolE+0x52)[0x7f0c1c3c6482] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so(invokePerfModel+0x3b)[0x7f0c1c3c21db] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x603266] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0xc7d9ff] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x61b43a] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x49a333] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x4929da] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x49153d] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0xbb7771] /lib64/libc.so.6(__libc_start_main+0xf5)[0x7f0c1ccfec05] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x403704] ======= Memory map: ======== 00400000-00e9f000 r-xp 00000000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0109e000-0109f000 r--p 00a9e000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0109f000-010a3000 rw-p 00a9f000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0113f000-09f1b000 rw-p 00000000 00:00 0 [heap] 7f0c14000000-7f0c14021000 rw-p 00000000 00:00 0 7f0c14021000-7f0c18000000 ---p 00000000 00:00 0 7f0c186ac000-7f0c18d6d000 rw-p 00000000 00:00 0 7f0c18d6d000-7f0c1942e000 rw-p 00000000 00:00 0 7f0c199cf000-7f0c1a390000 rw-p 00000000 00:00 0 7f0c1a671000-7f0c1ad32000 rw-p 00000000 00:00 0 7f0c1aeb4000-7f0c1b575000 rw-p 00000000 00:00 0 7f0c1b575000-7f0c1bc36000 rw-p 00000000 00:00 0 7f0c1bd04000-7f0c1c005000 rw-p 00000000 00:00 0 7f0c1c3bc000-7f0c1c3cf000 r-xp 00000000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c3cf000-7f0c1c5ce000 ---p 00013000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5ce000-7f0c1c5cf000 r--p 00012000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5cf000-7f0c1c5d0000 rw-p 00013000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5d0000-7f0c1c8d1000 rw-p 00000000 00:00 0 7f0c1c8d1000-7f0c1c8d8000 r-xp 00000000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1c8d8000-7f0c1cad7000 ---p 00007000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad7000-7f0c1cad8000 r--p 00006000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad8000-7f0c1cad9000 rw-p 00007000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad9000-7f0c1cadb000 r-xp 00000000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1cadb000-7f0c1ccdb000 ---p 00002000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdb000-7f0c1ccdc000 r--p 00002000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdc000-7f0c1ccdd000 rw-p 00003000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdd000-7f0c1ce95000 r-xp 00000000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1ce95000-7f0c1d095000 ---p 001b8000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d095000-7f0c1d099000 r--p 001b8000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d099000-7f0c1d09b000 rw-p 001bc000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d09b000-7f0c1d0a0000 rw-p 00000000 00:00 0 7f0c1d0a0000-7f0c1d0b7000 r-xp 00000000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d0b7000-7f0c1d2b6000 ---p 00017000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b6000-7f0c1d2b7000 r--p 00016000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b7000-7f0c1d2b8000 rw-p 00017000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b8000-7f0c1d2bc000 rw-p 00000000 00:00 0 7f0c1d2bc000-7f0c1d2d1000 r-xp 00000000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d2d1000-7f0c1d4d0000 ---p 00015000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d0000-7f0c1d4d1000 r--p 00014000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d1000-7f0c1d4d2000 rw-p 00015000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d2000-7f0c1d5a1000 r-xp 00000000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d5a1000-7f0c1d7a0000 ---p 000cf000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a0000-7f0c1d7a1000 r--p 000ce000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a1000-7f0c1d7a6000 rw-p 000cf000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a6000-7f0c1d7b0000 rw-p 00000000 00:00 0 7f0c1d7b0000-7f0c1d899000 r-xp 00000000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1d899000-7f0c1da99000 ---p 000e9000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1da99000-7f0c1daa1000 r--p 000e9000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1daa1000-7f0c1daa3000 rw-p 000f1000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1daa3000-7f0c1dab8000 rw-p 00000000 00:00 0 7f0c1dab8000-7f0c1dbb9000 r-xp 00000000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1dbb9000-7f0c1ddb8000 ---p 00101000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddb8000-7f0c1ddb9000 r--p 00100000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddb9000-7f0c1ddba000 rw-p 00101000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddba000-7f0c1e157000 r-xp 00000000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e157000-7f0c1e356000 ---p 0039d000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e356000-7f0c1e39f000 r--p 0039c000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e39f000-7f0c1e3c3000 rw-p 003e5000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e3c3000-7f0c1e3f1000 rw-p 00000000 00:00 0 7f0c1e3f1000-7f0c1e412000 r-xp 00000000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e5fa000-7f0c1e601000 rw-p 00000000 00:00 0 7f0c1e60a000-7f0c1e612000 rw-p 00000000 00:00 0 7f0c1e612000-7f0c1e613000 r--p 00021000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e613000-7f0c1e614000 rw-p 00022000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e614000-7f0c1e615000 rw-p 00000000 00:00 0 7fff63619000-7fff6363c000 rw-p 00000000 00:00 0 [stack] 7fff63713000-7fff63715000 r-xp 00000000 00:00 0 [vdso] ffffffffff600000-ffffffffff601000 r-xp 00000000 00:00 0 [vsyscall] ./run.sh: line 23: 25511 Aborted env OMP_NUM_THREADS=1 CSASIM_MODEL_MEMORY=1 ${EXE} -i in.rhodo-charmm

1 0

Re: [Anl-intel-csa] segfault with wide loads and memory model
by Christopher Knight 07 Sep '17

07 Sep '17

OK, got it. Thanks! chris On Sep 7, 2017, at 12:52 PM, Glossop, Kent <kent.glossop(a)intel.com> wrote: My apologies – this is something we communicated internally, but apparently neglected to call out externally: Wide loads are deprecated and are going to be removed. This decision was made both because of what the hardware can implement, and what we view as fitting well with the dataflow model. Please use either a collection of individual loads and/or streaming loads (sld) in their place. Multiple individual loads can potentially provide results in the same cycle. Streaming loads of stride 1 are a potential way to get improved memory throughput. (Internally, stride 1 streaming loads may be able to better utilize hardware in some similar ways to “wide loads”.) Again, my apologies – there are a lot of different things going on, and this was an oversight on my part to not communicate this earlier. Kent From: anl-intel-csa [mailto:[email protected]] On Behalf Of Christopher Knight Sent: Thursday, September 07, 2017 1:43 PM To: anl-intel-csa(a)jlse.anl.gov Subject: [Anl-intel-csa] segfault with wide loads and memory model Hello, I seem to be hitting a segfault when using the memory model, and it looks to be triggered by use of wide loads. The same graph runs fine without memory model. An example is below, where I can easily get around the segfault by using a sequence of loads. ld64x bi_addr, bondlist, i #ld32x8 i1, i2, type, %na, %na, %na, %na, %na, bi_addr ld32x i1, bi_addr, 0 ld32x i2, bi_addr, 1 ld32x type, bi_addr, 2 This is with a graph written for LAMMPS. I tried reproducing in one of the examples in ${CSASIM_TOP}/example, but that resulted in different crash… The example 059-multivalue-mem runs fine for me without memory model, but crashes with “one or more LICS not empty on exit” with memory model activated. chris ====================== Using simple memory model *** Error in `/home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa': free(): invalid size: 0x0000000002669650 *** ======= Backtrace: ========= /lib64/libc.so.6(+0x7c619)[0x7f0c1cd59619] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so(_ZN6CSASIM14VectorLoad8xOpINS_7i32TypeEE5issueEx+0x691)[0x7f0c1e062d51] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so(_ZN6CSASIM9Processor12stepOneCycleEPNS_6SymbolE+0x46f)[0x7f0c1e0754ff] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so(_ZN17ASIM_SYSTEM_CLASS11SYS_ExecuteEPN6CSASIM6SymbolE+0x52)[0x7f0c1c3c6482] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so(invokePerfModel+0x3b)[0x7f0c1c3c21db] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x603266] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0xc7d9ff] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x61b43a] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x49a333] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x4929da] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x49153d] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0xbb7771] /lib64/libc.so.6(__libc_start_main+0xf5)[0x7f0c1ccfec05] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x403704] ======= Memory map: ======== 00400000-00e9f000 r-xp 00000000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0109e000-0109f000 r--p 00a9e000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0109f000-010a3000 rw-p 00a9f000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0113f000-09f1b000 rw-p 00000000 00:00 0 [heap] 7f0c14000000-7f0c14021000 rw-p 00000000 00:00 0 7f0c14021000-7f0c18000000 ---p 00000000 00:00 0 7f0c186ac000-7f0c18d6d000 rw-p 00000000 00:00 0 7f0c18d6d000-7f0c1942e000 rw-p 00000000 00:00 0 7f0c199cf000-7f0c1a390000 rw-p 00000000 00:00 0 7f0c1a671000-7f0c1ad32000 rw-p 00000000 00:00 0 7f0c1aeb4000-7f0c1b575000 rw-p 00000000 00:00 0 7f0c1b575000-7f0c1bc36000 rw-p 00000000 00:00 0 7f0c1bd04000-7f0c1c005000 rw-p 00000000 00:00 0 7f0c1c3bc000-7f0c1c3cf000 r-xp 00000000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c3cf000-7f0c1c5ce000 ---p 00013000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5ce000-7f0c1c5cf000 r--p 00012000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5cf000-7f0c1c5d0000 rw-p 00013000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5d0000-7f0c1c8d1000 rw-p 00000000 00:00 0 7f0c1c8d1000-7f0c1c8d8000 r-xp 00000000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1c8d8000-7f0c1cad7000 ---p 00007000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad7000-7f0c1cad8000 r--p 00006000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad8000-7f0c1cad9000 rw-p 00007000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad9000-7f0c1cadb000 r-xp 00000000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1cadb000-7f0c1ccdb000 ---p 00002000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdb000-7f0c1ccdc000 r--p 00002000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdc000-7f0c1ccdd000 rw-p 00003000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdd000-7f0c1ce95000 r-xp 00000000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1ce95000-7f0c1d095000 ---p 001b8000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d095000-7f0c1d099000 r--p 001b8000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d099000-7f0c1d09b000 rw-p 001bc000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d09b000-7f0c1d0a0000 rw-p 00000000 00:00 0 7f0c1d0a0000-7f0c1d0b7000 r-xp 00000000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d0b7000-7f0c1d2b6000 ---p 00017000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b6000-7f0c1d2b7000 r--p 00016000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b7000-7f0c1d2b8000 rw-p 00017000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b8000-7f0c1d2bc000 rw-p 00000000 00:00 0 7f0c1d2bc000-7f0c1d2d1000 r-xp 00000000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d2d1000-7f0c1d4d0000 ---p 00015000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d0000-7f0c1d4d1000 r--p 00014000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d1000-7f0c1d4d2000 rw-p 00015000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d2000-7f0c1d5a1000 r-xp 00000000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d5a1000-7f0c1d7a0000 ---p 000cf000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a0000-7f0c1d7a1000 r--p 000ce000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a1000-7f0c1d7a6000 rw-p 000cf000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a6000-7f0c1d7b0000 rw-p 00000000 00:00 0 7f0c1d7b0000-7f0c1d899000 r-xp 00000000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1d899000-7f0c1da99000 ---p 000e9000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1da99000-7f0c1daa1000 r--p 000e9000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1daa1000-7f0c1daa3000 rw-p 000f1000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1daa3000-7f0c1dab8000 rw-p 00000000 00:00 0 7f0c1dab8000-7f0c1dbb9000 r-xp 00000000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1dbb9000-7f0c1ddb8000 ---p 00101000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddb8000-7f0c1ddb9000 r--p 00100000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddb9000-7f0c1ddba000 rw-p 00101000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddba000-7f0c1e157000 r-xp 00000000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e157000-7f0c1e356000 ---p 0039d000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e356000-7f0c1e39f000 r--p 0039c000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e39f000-7f0c1e3c3000 rw-p 003e5000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e3c3000-7f0c1e3f1000 rw-p 00000000 00:00 0 7f0c1e3f1000-7f0c1e412000 r-xp 00000000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e5fa000-7f0c1e601000 rw-p 00000000 00:00 0 7f0c1e60a000-7f0c1e612000 rw-p 00000000 00:00 0 7f0c1e612000-7f0c1e613000 r--p 00021000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e613000-7f0c1e614000 rw-p 00022000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e614000-7f0c1e615000 rw-p 00000000 00:00 0 7fff63619000-7fff6363c000 rw-p 00000000 00:00 0 [stack] 7fff63713000-7fff63715000 r-xp 00000000 00:00 0 [vdso] ffffffffff600000-ffffffffff601000 r-xp 00000000 00:00 0 [vsyscall] ./run.sh: line 23: 25511 Aborted env OMP_NUM_THREADS=1 CSASIM_MODEL_MEMORY=1 ${EXE} -i in.rhodo-charmm

1 0

Re: [Anl-intel-csa] segfault with wide loads and memory model
by Glossop, Kent 07 Sep '17

07 Sep '17

My apologies – this is something we communicated internally, but apparently neglected to call out externally: Wide loads are deprecated and are going to be removed. This decision was made both because of what the hardware can implement, and what we view as fitting well with the dataflow model. Please use either a collection of individual loads and/or streaming loads (sld) in their place. Multiple individual loads can potentially provide results in the same cycle. Streaming loads of stride 1 are a potential way to get improved memory throughput. (Internally, stride 1 streaming loads may be able to better utilize hardware in some similar ways to “wide loads”.) Again, my apologies – there are a lot of different things going on, and this was an oversight on my part to not communicate this earlier. Kent From: anl-intel-csa [mailto:[email protected]] On Behalf Of Christopher Knight Sent: Thursday, September 07, 2017 1:43 PM To: anl-intel-csa(a)jlse.anl.gov Subject: [Anl-intel-csa] segfault with wide loads and memory model Hello, I seem to be hitting a segfault when using the memory model, and it looks to be triggered by use of wide loads. The same graph runs fine without memory model. An example is below, where I can easily get around the segfault by using a sequence of loads. ld64x bi_addr, bondlist, i #ld32x8 i1, i2, type, %na, %na, %na, %na, %na, bi_addr ld32x i1, bi_addr, 0 ld32x i2, bi_addr, 1 ld32x type, bi_addr, 2 This is with a graph written for LAMMPS. I tried reproducing in one of the examples in ${CSASIM_TOP}/example, but that resulted in different crash… The example 059-multivalue-mem runs fine for me without memory model, but crashes with “one or more LICS not empty on exit” with memory model activated. chris ====================== Using simple memory model *** Error in `/home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa': free(): invalid size: 0x0000000002669650 *** ======= Backtrace: ========= /lib64/libc.so.6(+0x7c619)[0x7f0c1cd59619] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so(_ZN6CSASIM14VectorLoad8xOpINS_7i32TypeEE5issueEx+0x691)[0x7f0c1e062d51] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so(_ZN6CSASIM9Processor12stepOneCycleEPNS_6SymbolE+0x46f)[0x7f0c1e0754ff] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so(_ZN17ASIM_SYSTEM_CLASS11SYS_ExecuteEPN6CSASIM6SymbolE+0x52)[0x7f0c1c3c6482] /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so(invokePerfModel+0x3b)[0x7f0c1c3c21db] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x603266] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0xc7d9ff] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x61b43a] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x49a333] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x4929da] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x49153d] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0xbb7771] /lib64/libc.so.6(__libc_start_main+0xf5)[0x7f0c1ccfec05] /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa[0x403704] ======= Memory map: ======== 00400000-00e9f000 r-xp 00000000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0109e000-0109f000 r--p 00a9e000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0109f000-010a3000 rw-p 00a9f000 00:29 34086177 /home/knightc/projects/csa/lammps-31Mar2017/src/lmp_jlse_csa 0113f000-09f1b000 rw-p 00000000 00:00 0 [heap] 7f0c14000000-7f0c14021000 rw-p 00000000 00:00 0 7f0c14021000-7f0c18000000 ---p 00000000 00:00 0 7f0c186ac000-7f0c18d6d000 rw-p 00000000 00:00 0 7f0c18d6d000-7f0c1942e000 rw-p 00000000 00:00 0 7f0c199cf000-7f0c1a390000 rw-p 00000000 00:00 0 7f0c1a671000-7f0c1ad32000 rw-p 00000000 00:00 0 7f0c1aeb4000-7f0c1b575000 rw-p 00000000 00:00 0 7f0c1b575000-7f0c1bc36000 rw-p 00000000 00:00 0 7f0c1bd04000-7f0c1c005000 rw-p 00000000 00:00 0 7f0c1c3bc000-7f0c1c3cf000 r-xp 00000000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c3cf000-7f0c1c5ce000 ---p 00013000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5ce000-7f0c1c5cf000 r--p 00012000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5cf000-7f0c1c5d0000 rw-p 00013000 00:4c 290470 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsa-memory-model.so 7f0c1c5d0000-7f0c1c8d1000 rw-p 00000000 00:00 0 7f0c1c8d1000-7f0c1c8d8000 r-xp 00000000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1c8d8000-7f0c1cad7000 ---p 00007000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad7000-7f0c1cad8000 r--p 00006000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad8000-7f0c1cad9000 rw-p 00007000 fd:00 403374931 /usr/lib64/librt-2.17.so 7f0c1cad9000-7f0c1cadb000 r-xp 00000000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1cadb000-7f0c1ccdb000 ---p 00002000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdb000-7f0c1ccdc000 r--p 00002000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdc000-7f0c1ccdd000 rw-p 00003000 fd:00 403166150 /usr/lib64/libdl-2.17.so 7f0c1ccdd000-7f0c1ce95000 r-xp 00000000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1ce95000-7f0c1d095000 ---p 001b8000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d095000-7f0c1d099000 r--p 001b8000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d099000-7f0c1d09b000 rw-p 001bc000 fd:00 403007441 /usr/lib64/libc-2.17.so 7f0c1d09b000-7f0c1d0a0000 rw-p 00000000 00:00 0 7f0c1d0a0000-7f0c1d0b7000 r-xp 00000000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d0b7000-7f0c1d2b6000 ---p 00017000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b6000-7f0c1d2b7000 r--p 00016000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b7000-7f0c1d2b8000 rw-p 00017000 fd:00 403374927 /usr/lib64/libpthread-2.17.so 7f0c1d2b8000-7f0c1d2bc000 rw-p 00000000 00:00 0 7f0c1d2bc000-7f0c1d2d1000 r-xp 00000000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d2d1000-7f0c1d4d0000 ---p 00015000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d0000-7f0c1d4d1000 r--p 00014000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d1000-7f0c1d4d2000 rw-p 00015000 fd:00 404729079 /usr/lib64/libgcc_s-4.8.5-20150702.so.1 7f0c1d4d2000-7f0c1d5a1000 r-xp 00000000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d5a1000-7f0c1d7a0000 ---p 000cf000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a0000-7f0c1d7a1000 r--p 000ce000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a1000-7f0c1d7a6000 rw-p 000cf000 00:4c 305976 /soft/restricted/intel_csa/comp/tools/2017-09-06-release/tools/install/lib/libomp.so 7f0c1d7a6000-7f0c1d7b0000 rw-p 00000000 00:00 0 7f0c1d7b0000-7f0c1d899000 r-xp 00000000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1d899000-7f0c1da99000 ---p 000e9000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1da99000-7f0c1daa1000 r--p 000e9000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1daa1000-7f0c1daa3000 rw-p 000f1000 fd:00 402654633 /usr/lib64/libstdc++.so.6.0.19 7f0c1daa3000-7f0c1dab8000 rw-p 00000000 00:00 0 7f0c1dab8000-7f0c1dbb9000 r-xp 00000000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1dbb9000-7f0c1ddb8000 ---p 00101000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddb8000-7f0c1ddb9000 r--p 00100000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddb9000-7f0c1ddba000 rw-p 00101000 fd:00 403261512 /usr/lib64/libm-2.17.so 7f0c1ddba000-7f0c1e157000 r-xp 00000000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e157000-7f0c1e356000 ---p 0039d000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e356000-7f0c1e39f000 r--p 0039c000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e39f000-7f0c1e3c3000 rw-p 003e5000 00:4c 290471 /soft/restricted/intel_csa/comp/fsim/2017-09-06-release/libcsasim.so 7f0c1e3c3000-7f0c1e3f1000 rw-p 00000000 00:00 0 7f0c1e3f1000-7f0c1e412000 r-xp 00000000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e5fa000-7f0c1e601000 rw-p 00000000 00:00 0 7f0c1e60a000-7f0c1e612000 rw-p 00000000 00:00 0 7f0c1e612000-7f0c1e613000 r--p 00021000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e613000-7f0c1e614000 rw-p 00022000 fd:00 402988622 /usr/lib64/ld-2.17.so 7f0c1e614000-7f0c1e615000 rw-p 00000000 00:00 0 7fff63619000-7fff6363c000 rw-p 00000000 00:00 0 [stack] 7fff63713000-7fff63715000 r-xp 00000000 00:00 0 [vdso] ffffffffff600000-ffffffffff601000 r-xp 00000000 00:00 0 [vsyscall] ./run.sh: line 23: 25511 Aborted env OMP_NUM_THREADS=1 CSASIM_MODEL_MEMORY=1 ${EXE} -i in.rhodo-charmm

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