On Tue, Oct 30, 2012 at 08:00:12AM -0700, Jed Brown wrote:

On Tue, Oct 30, 2012 at 6:54 AM, Torsten Hoefler <[1][email protected]> wrote:

>>> I don't think �the target process can guarantee that the PUT is >>> visible to a load/store �without an additional memory barrier. >> The flush of the source process has to ensure that. > > How? See above, mfence.

Even in shared memory, the mfence is useless for guaranteeing visibility to any other thread/process. For visibility on architectures that reorder loads, the P1 must issue a read memory barrier after seeing the hand wave and before reading from the window. My stated assumption was TSO/x86, which does not reorder loads. You are of course correct in the general case (ARM for example).

Best, Torsten -- ### qreharg rug ebs fv crryF ------------- http://www.unixer.de/ ----- Torsten Hoefler | Assistant Professor Dept. of Computer Science | ETH Z�rich Universit�tsstrasse 6 | Zurich-8092, Switzerland CAB E 64.1 | Phone: +41 76 309 79 29