Begin forwarded message:

Date: January 9, 2015 at 11:26:46 AM CST From: Kazutomo Yoshii <[email protected]> To: Kalyan Kumaran <[email protected]> Subject: Re: [JLSE-Admins] Project Request Form

Adam is collaborating with me (in a CESAR context), but he's focusing on application and algorithm. He needs a dedicated access (in a time-sharing manner) to another Haswell node in the data center.

I'd like to run a series of my experiments on the Haswell node that is currently located in tinkerlab, which probably needs a couple of weeks, so time-sharing with him may be hard for me.

Ben: I'm ok with moving the Haswell node back to the data center as long as I can use IPMI and have a separate disk partition to boot my OS image.

- kaz

On 01/09/2015 10:20 AM, Kalyan Kumaran wrote:

...

Do we have to provide anything for this? Or is this what Kaz is already doing?

Thanks, Kumar

...

On Dec 23, 2014, at 12:59 PM, Adam Hammouda <[email protected]> wrote:

From: Adam Hammouda <[email protected]> Energy Savings and Performance Optimizations With Pliable Algorithms on Intel’s E5-2699v3 (Haswell) Nodes Adam Hammouda, Andrew Siegel, Pete Beckman MCS The goal of our research is to study operating system design decisions for next generation HPC architectures. In particular, we aim to study the impact which those decisions have on application performance characteristics. Further, we aim to understand how these decisions and performance characteristics relate to the thermal stability and energy effeciency of the architecture in question. Broad questions of interest to our research include the following:

• Is there a layer of the HPC runtime environment best equipped for mitigating thermal load imbalances (i.e. OS, runtime system, or application)? • If it is more optimal to share these responsibilities between layers, what is the optimal division of labor? • What are the best metrics for the above referenced optimality? • With such metrics, what are acceptable tradeoffs between performance and energy? • What are generalizable strategies for the application layer to handle thermal load imbalances? What is a generalizable strategy for the application layer to receive and share information with the runtime system?

In an earlier work, we reformulated an algorithm class of bulk-synchronous computation to account for nonuniformities in process execution rates. The challenge of energy and thermal efficiency presented by next generation machines is precisely what motivated our algorithmic developments in this previous work. The COOLR project presents an opportunity to pursue this line of inquiry even further by exploring the precise characteristics of these anticipated nonuniformities. To this end we have already begun our explorations of the Intel Xeon E5-2670 machine available to us. We are exploring the effects of per-socket controls over cpu frequency, and pstate setings, and we have developed metrics to quantify the tradeoffs in performance and thermal load balance. However, our algorithmic work in Hammouda and Siegel 2013 was designed to exploit per-process nonuniformities in execution rates, and we therefore could benefit greatly from a machine which provides access to these controls. COOLR, CESAR Northwestern Adam Hammouda, Kaicheng Zhang (Northwestern) E5-2699v3 (Haswell) nodes (http://ark.intel.com/products/81061/Intel-Xeon-Processor-E5-2699-v3-45M-Cach...). In particular, we would like isolated and IPMI access to change BIOS. Such access would allow us to explore the per-process strategies for thermal load balancing, and the subsequently necessary application optimization. [Schedule (when access is needed and for how long):]

-- This e-mail was sent from a contact form on The Joint Laboratory for System Evaluation (http://press3.mcs.anl.gov/jlse)

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